1. Field of the Invention
The present invention relates to a method for manufacturing a photomask, suitable for reducing the production time, and to a method for manufacturing a semiconductor device using the photomask. More specifically, the present invention relates to a method for manufacturing a photomask in which data for forming a pattern on the photomask can be created in a short time, and to a method for manufacturing a semiconductor device using the photomask.
2. Description of the Related Art
With the recent reduction in size of semiconductor devices, there has been a demand for miniaturization of resist patterns formed by photolithography for manufacturing semiconductor devices. When light is applied to a photomask and the resist is exposed with light, a pattern on the photomask is transferred to form a resist pattern. If the pattern size of the resist pattern is close to the wavelength of light used for formation of the resist pattern because miniaturization of resist pattern has advanced, the pattern on the photomask is deformed, while transferred, due to the optical proximity effect.
In order to prevent deformation of the resist pattern, the deformation of the resist pattern due to the optical proximity effect is predicted by simulation, etc., to correct the original pattern on the photomask.
However, such simulation, when performed using a computer, requires much time for computation because of the high pattern density on the photomask. There are many approaches for reducing the computation time to rapidly correct the pattern on the photomask, and one of them is proposed in, for example, Japanese Unexamined Patent Application Publication No. 2001-13669.
In the approach proposed in this publication, regions for correction are provided with respect to an object for correction in the input layout, and pattern-matching regions that are a certain amount larger than the regions for correction are also provided so as to surround the regions for correction. Then, the pattern layout in each of the pattern-matching regions is extracted. Then, the grid in this pattern-matching region is converted into a larger grid than the original grid. Thereafter, pattern matching is performed on a pattern region. As a result of pattern matching, for example, three kinds into which the pattern-matching regions that are classified using the original grid are reduced to two kinds after conversion of the grid.
After pattern matching is performed on all regions for correction, the classified pattern-matching regions are corrected. The corrected pattern-matching regions are reflected in the entirety of the input layout, and the corrected layout is thus obtained.
Therefore, conversion of the grid can reduce the number of kinds of pattern-matching regions. Thus, the computation time for correcting the pattern-matching regions can also be reduced. Moreover, a correction result of a pattern computed for one pattern-matching region can also be used for the same kind of other pattern-matching regions, thus reducing the computation time required for reflecting the corrected pattern-matching regions in the entirety of the input layout.